home
***
CD-ROM
|
disk
|
FTP
|
other
***
search
/
PC Electronic Plus
/
PC Electronics Plus (Most Significant Bits)(1995).ISO
/
tiny
/
tdca.doc
< prev
next >
Wrap
Text File
|
1991-06-29
|
11KB
|
306 lines
Tiny Digital Circuit Analysis
Version 1.1
Written by: M. W. Correa
General
Tiny Digital Circuit Analysis (TDCA) is a shareware program
that allows a student or engineer to simulate a small digital
circuit design. This program allows one to enter a digital
circuit design by entering each device type and its connections.
Then the circuit can be evaluated with entered inputs. The
circuit can also be graphically displayed with all of its cir-
cuit/device input/output values displayed. This graphic display
is very helpful for finding race conditions and observing inter-
nal circuit states.
I originally wrote this program to evaluate solutions to home-
work problems I had in a digital design class. The particular
circuit types that begged for simulation were the finite state
machine problems. A common complication that occurs when design-
ing state machines is the occurrence of race conditions. There-
fore I wrote this program with the idea of spotting any race
conditions. This is accomplished by evaluating all devices at
one time, therefore all inputs to the devices are updated and
frozen and then all the gates are evaluated and their outputs are
updated. In the case of one device's output feeding the input of
another device, you may see a different value on the output of
the feeding device than the input of the receiving device. The
next evaluation step will update the input to reflect the output
from the feeding device. Each device is assumed to have the same
propagation delay (not realistic).
In the spirit of shareware software please try this program.
If you intend on using this program please become a registered
user. If you have any comments on this program please let me
know, I will be glad to enhance this program, if there is enough
interest expressed in it.
Hardware Requirements
TDCA runs on IBM PCs and compatibles with 128K of free RAM and
a CGA, EGA or VGA graphics card/display. Up to 100 devices can
be simulated, although the Show command is limited by how many
devices can be placed on the screen at one time.
Program Operation
The menu structure is the very common command line type (i.e.
Lotus 123). The program uses hot keys for commands, therefore,
1
just press the first letter of the command you would like to
execute. Circuit Input data is entered with hot keys 0 and 1.
While building a new circuit no hot keys are used, the data
should be entered and the Enter key must be pressed.
Program Commands
New - Clears the current circuit and proceeds to build a new
circuit.
Inputs - Quarries for new input values for the circuit.
Alter - Allows the user to change the current circuit. It is a
good idea to save the circuit before using this option. It
is very easy to goof-up.
Evaluate - The inputs of each device in the circuit are updated
and then the devices are evaluated and outputs are updated.
Clock - The clock signal is set high, all devices that are fed
the clock are evaluated, the clock is set low and the whole
circuit is then evaluated.
Gates - Text display of the circuit's gates, detailing each input
connection and each I/O state.
Show - Graphical display of the circuit with the current I/O
state of each device. New circuits will require the place-
ment of each device. The program will ask for an X and Y
coordinate for each device. The program automatically
routes the interconnect. Care should be exercised while
placing devices to avoid the routing of the interconnect
over devices (overlaps cause no problems, but looks bad).
The auto-routing feature could use more smarts, but my
efforts were applied else where.
Truth - Text display of a truth table, good for non-feedback
combinational logic.
File - Allows loading and saving of circuits. Do not use the
file extension and do use proper DOS filenames (8 characters
maximum, etc.). The file extension of DCA is automatically
assigned.
Quit - Leaves the program WITHOUT saving anything.
Device Types
The devices supported by this program are:
AND Gate - Two to eight inputs, one output.
OR Gate - Two to eight inputs, one output.
2
NAND Gate - Two to eight inputs, one output.
NOR Gate - Two to eight inputs, one output.
XOR Gate (Exclusive OR) - Two inputs, one output.
INVERTER - One input, one output.
D FLIP FLOP - Input one is D, input two is CLK, output one is Q,
output two is Q-.
T FLIP FLOP - Input one is T, input two is CLK, output one is Q,
output two is Q-.
S R FLIP FLOP - Input one is S, input two is R, input three is
CLK, output one is Q, output two is Q-.
J K FLIP FLOP - Input one is J, input two is K, input three is
CLK, output one is Q, output two is Q-.
Hints
1. Before entering the circuit into TDCA draw it on a piece of
paper. Then number separately each input, output and device.
2. Note that the clocks of the flip flops are active high and
are not edge triggered.
3. Save your circuit before using Alter or Quitting the program.
4. When entering a new circuit keep in mind that circuit inputs
are selected by entering 0 for device number and then the input
number. To select the clock for an input enter 0 for device
number and then 0 for the input number.
Future
Recently (6/91) I was designing a digital board that had a
number of finite state machines and various other subcircuits.
During the design of this circuit I was interrupted numerous
times and a number of the interruptions lasted for days. Since
this board is on the order of 60 chips, I became concerned that
the board would not work due to forgotten interdependences. So,
I used this program to simulate parts of my design. And as you
will discover this program has its limitation, since it was not
intended to simulate real designs but to simulate the designs you
do in school (not real world). So I sought and found a well
known and expensive simulator, to simulate the board. Well, this
$1,000 simulator does support real TTL devices, but it does not
do much more than TDCA. The program did not support all the
chips I used in my design, thus, I was only able to simulate the
3
same part I used TDCA to simulate. Worse yet, the simulator did
not do timing analysis. Therefore, real world time delays go
unaccounted for. At additional cost, I could buy options for the
program that will do timing analysis and expanded library sup-
port, but the cost is higher than the original program cost.
Thus comes the reason I decided to release this program to the
shareware world. I did a search of Compuserve for digital simu-
lators and found none. So, I concluded that there is probably a
demand for a low cost full feature simulator. The response to
this program will determine if I will commit the time to write a
full feature digital simulator, (that's right, to be called
Digital Circuit Analysis [DCA]). The new program will be a
complete re-write and its intended major features will include:
Support the TTL device library.
Timing analysis to include propagation delays.
Import netlist from CAD packages such as ORCAD and Futurenet.*
Logic analyzer type display for signals.
If the response to this program (TDCA) is sufficient, (20 or
more registered users) I will write DCA. Registered users of
TDCA will be invited to be Beta testers for DCA. (You must
register for TDCA before the release of DCA to qualify as a Beta
test site.)
* ORCAD and Futurenet are registered trademarks and are not
associate with this product.
4
Registration Form
Tiny Digital Circuit Analysis
Tiny Digital Circuit Analysis (TDCA) is distributed as share-
ware. The program may be distributed freely, provided that the
entire unmodified ARC file is included and no fee is charged
other than a nominal amount for media and handling.
The registration fee is $20 US and will provide a single user
license to use this program (TDCA) without limit.
The $20 fee should be sent to:
Mike Correa
2210 Lawnwood Circle
Baltimore MD 21207
Please indicate your interest below.
__ Would like to become a Beta tester for DCA. **
__ Would like to see DCA developed.
__ Would like TDCA expanded. Please give comments below.
Name: ___________________________________
Address: ___________________________________
___________________________________
Comments on TDCA:
Comments for DCA (features desired, price range, etc.):
** DCA will be written contingent upon the response to TDCA or
other means that will confirm my presumption that there exist a
demand for a low cost digital simulator.
5